Describe the Instruction cycle state diagram with interrupts

Instruction cycle state diagram with interrupts

(i) Instruction address calculation (iac): Determine the address of the next instruction to be executed. Usually, this involves adding a fixed number to the adress of the previous instruction.

For example, if each instruction is 16 bits long and memory is organized into 16-bit words, then add 1 to the previous address.

(ii) Instruction fetch (if): Read instruction from its memory location into the processor.

(iii) Instruction operation decoding (iod): Analyze instruction to determine type of operation to be performed and operand to be used.

(iv)Operand address calculation (oac): If the operation involves reference to an operation in memory or available via I/O, then determine the address of the operand.

(v)Operand fetch (of): Fetch the operand from memory or read it in from I/O.

(vi) Data operation (dt): Perform the operation indicated in the instruction.

(vii) Operand store(os): Write the result into memory or out to I/O.

(viii) Fetch: Read the next instruction from memory into the processor.

(ix) Execute: Interpret the op-code and perform the indicated operation.

(x) Interrupt: If interrupts are enabled and an interrupt has occurred, save the current process state and service the interrupt.

The main line of activity consists of alternating instruction fetch and instruction execution activities. After an instruction is fetched, it is examined to determine if any indirect addressing is involved. If so, the required operands are fetched using indirect addressing following execution, an interrupt may be processed before the next instruction fetch.